1. Field of the Invention
The invention relates to a printed-wiring board and an electronic device including the printed-wiring board, and more particularly to a printed-wiring board fabricated in accordance with a subtractive process and having an electronic part inserted thereinto, and an electronic device including the printed-wiring board.
2. Description of the Related Art
A subtractive process has been conventionally known as a process for fabricating a printed-wiring board. The subtractive process is most general among processes for fabricating a printed-wiring board.
Hereinbelow is explained a subtractive process for fabricating a printed-wiring board, with reference to FIG. 10. FIG. 10 is a cross-sectional view of a conventional printed-wiring board on which electronic parts are mounted.
As illustrated in FIG. 10, a printed-wiring board 1 is formed with a through-hole 2. An electrode 4a of an electronic part 4 is soldered in the through-hole 2 with tin-lead eutectic solder (Sn: 63 wt %, Pb: 37%).
The printed-wiring board 1 is fabricated as follows.
First, there is fabricated an electrically insulating pre-preg 5 by impregnating a board such as a paper board, a glass board or a polyester-fiber board with resin such as epoxy resin or phenol resin.
Then, a copper foil is fixed onto a surface of the pre-preg 5 by compressing the foil onto the surface or heating the foil on the surface. Thus, the board is covered with the copper foil. Then, the copper foil is etched for fabricating an internal layer pattern 6 in a predetermined region of the board. Thereafter, a portion of the copper foil unnecessary for electrical conduction is removed.
Then, the board covered with the copper foil is sandwiched between the pre-pregs 5. Then, copper foils are placed on surfaces of the pre-pregs 5 sandwiching the board therebetween. Then, the board, the pre-pregs 5 and the copper foils are thermally pressed to fix to one another. The pre-pregs 5 and the copper foils are identical with the previously mentioned pre-preg and copper foil.
Then, the copper foils are etched to thereby fabricate internal layer patterns 6.
The above-mentioned steps are repeatedly carried out a predetermined number of times. Thus, there is fabricated the N-layered printed-wiring board 1.
In FIG. 10, only a first layer L1, a second layer L2, a (N−1)-th layer L(N−1), and a N-th layer LN are illustrated.
After the fabrication of the N-layered printed-wiring board 1, the printed-wiring board is formed the through-hole 2 into which the electronic part 4 is to be inserted.
Then, the through-hole 2 is de-smeared. Herein, “de-smear” means to chemically remove smears (burs) sometimes accompanied with drilling of the through-hole 2.
After having de-smeared the through-hole, an underlying plating layer is formed on an inner wall of the through-hole 2, and then, electrolytic copper plating is carried out to thereby form an electrically conductive layer 2a on an inner wall of the through-hole 2. The copper foils fixed on surfaces of the first and N-th layers L1 and LN are electrically connected to each other through the electrically conductive layer 2a. 
After the fabrication of the electrically conductive layer 2a, the copper foils fixed on surfaces of the first and N-th layers L1 and LN are etched to thereby form external surface patterns 7 and external surface lends 7a. 
Then, solder resist 8 is coated on surfaces of the first and N-th layers L1 and LN such that the tin-lead eutectic solder 3 is not adhered to areas other than area to which the tin-lead eutectic solder 3 is to be soldered. Then, the solder resist 8 is exposed to light.
As mentioned above, when the printed-wiring board 1 is fabricated in accordance with a subtractive process, the solder resist 8 is coated on surfaces of the first and N-th layers L1 and LN only in areas in which the external surface lands 7a are to be formed, and thus, the solder resist 8 protects the external surface patterns 7 other than the external surface lands 7a on which the electrode 4a of the electronic part 4 is to be mounted.
In the conventional printed-wiring board 1 fabricated in accordance with a subtractive process, with respect to layers which are not necessary to be electrically connected to other layers, among internal layers comprised of the second layer L2 to the (N−1)-layer L(N−1), internal layer patterns 6 around the through-hole 2 are partially removed by etching, keeping a sufficient clearance therebetween such that the internal layer patterns 6 are not exposed to the through-hole 2.
Accordingly, in the internal layers not electrically connected to other layers, the electrically conductive layer 2a and the electrically insulating pre-pregs 5 are adhered to each other merely by virtue of anchor effect caused by plating. Hence, assuming the electrically conductive layer 2a makes contact with the pre-pregs 5 by a length (hereinafter, referred to as “contact-length L”), a longer contact-length would cause a higher stress between the electrically conductive layer 2a and the pre-pregs 5, when a high shearing stress is generated due to thermal expansion of them.
This causes defects in electrical connection in the through-hole 2 in the case that the electrode 4a of the electronic part 4 is inserted into the through-hole 2 through the use of solder having a high melting point (for instance, as mentioned later, lead-free solder). Hence, whereas it is not necessary to prepare countermeasures to defects in electrical connection in the through-hole 2, if tin-lead eutectic solder 3 is used, it was necessary to prepare countermeasures to defects in electrical connection in the through-hole 2, if solder having a high melting point is used.
For instance, Japanese Patent Application Publications Nos. 3-165093, 3-165094, 63-264341, 4-354180, 6-120667 and 2001-24297 have suggested printed-wiring boards including countermeasures to defects in electrical connection in the through-hole 2.
In recent years, lead-free solder is mainly selected in place of lead-containing solder in order to prevent environmental pollution caused by lead.
As mentioned later in detail, the inventors found out that when an electronic part is mounted on a printed-wiring board by means of solder having a high melting point, in particular, lead-free solder, there are caused many problems such as peeling-off of the electrically conductive layer 2a. However, in the printed-wiring boards having been suggested in the above-mentioned Publications, influence which solder having a high melting point, in particular, lead-free solder exerts on reliability of the printed-wiring boards is not suggested and considered at all.
Lead-free solder contains tin as a primary constituent, and further contains silver, copper, zinc, bismuth, indium, antimony, nickel, germanium and so on. In comparison with tin-lead (Sn—Pb) eutectic solder (Sn: 63 wt %, Pb: 37 wt %) most frequently used for soldering in electronic parts, lead-free solder has higher tensile strength and creep strength, and smaller elongation.
Hence, stress relaxation is unlikely to be caused in lead-free solder in comparison with lead-containing solder. In addition, with respect to a melting point, whereas tin-lead eutectic solder has a melting point of 183 degrees centigrade, lead-free solder has a melting point in the range of 190 to 230 degrees centigrade, which is higher than the melting point of tin-lead eutectic solder.
As lead-free solder presently much used, there are tin-zinc (Sn—Zn) solder, tin-copper (Sn—Cu) solder and tin-silver (Sn—Ag) solder.
Tin-zinc (Sn—Zn) solder contains Sn—9.0 wt % Zn, eutectic composition of tin and zinc, as a principal constituent, in which zinc may be varied in an amount, and further contains other elements to have improved characteristics. A typical example of tin-zinc (Sn—Zn) solder is Sn—8.0Zn—3.0Bi.
Tin-copper (Sn—Cu) solder contains Sn—0.7 wt % Cu, eutectic composition of tin and copper, as a principal constituent, in which copper may be varied in an amount, and further contains other elements to have improved characteristics. A typical example of tin-copper (Sn—Cu) solder is Sn—0.7Cu—0.3Ag.
Tin-silver (Sn—Ag) solder contains Sn—3.5 wt % Ag, eutectic composition of tin and silver, as a principal constituent, in which silver may be varied in an amount, and further contains other elements to have improved characteristics. A typical example of tin-silver (Sn—Ag) solder is Sn—3.0Ag—0.5Cu or Sn—3.5Ag—0.75Cu.
However, the above-mentioned lead-free solders are accompanied with a problem that when high shearing stress is caused by thermal expansion in lead-free solders having a high melting point, the electrically conductive layer 2a and the electrically insulating pre-pregs 5 are peeled off each other, that is, peeling-off of walls is caused at a possibility ten or more times greater than conventional tin-lead eutectic solder.
In addition, in the first and N-th layers as external layers of the printed-wiring board 1, the pre-pregs 5 and the external surface lands 7a may be peeled off each other, that is, peeling-off of lands may be caused, resulting in that the external surface pattern 7 electrically connected to the external surface lands 7a may be disconnected due to thermal stress.
For the reasons mentioned above, when the electrode 4a of the electronic part 4 was soldered in the through-hole 2 with lead-free solder, it was necessary to check reliability of the printed-wiring board 1 and areas in which the electrode was soldered to the through-hole.
The inventors carried out reliability test to the conventional printed-wiring board 1. Specifically, after the electronic part 4 such as a connector composed of resin such as polyamide was flow-soldered in the through-hole with lead-free solder, temperature-cycle test as lifetime test was carried out to the conventional printed-wiring board 1. The result was that disconnection or breakage was likely to be found early, in particular, in the through-hole 2 having no electrical conduction with the internal layer patterns 6.
Polyamide is a resin having a higher coefficient of thermal expansion than the same of the printed-wiring board 1 in X-Y direction. The temperature-cycle test was carried out at a cycle of −40 degrees centigrade (30 minutes), 25 degrees centigrade (5 minutes), and 125 degrees centigrade (30 minutes).
The above-mentioned disconnection is explained hereinbelow with respect to a conventional four-layered printed-wiring board, for instance.
The conventional four-layered printed-wiring board corresponds to the printed-wiring board 1 illustrated in FIG. 10 wherein the N-th layer is a fourth layer and the (N−1)-layer is a third layer, and second and third layers are not electrically connected to the electrically conductive layer 2a, and thus, the through-hole 2 merely passes through the pre-pregs 5 in the second and third layers.
It was found out that whereas the conventional tin-lead eutectic solder 3 hardly exerted influence on reliability of the printed-wiring board 1, lead-free solder having a high melting point caused defects in electrical connection which were not found in the conventional tin-lead eutectic solder 3, and hence, explicitly exerted influence on reliability of the printed-wiring board 1.
Hereinbelow, the above-mentioned matter is explained.
FIG. 11 shows the results of the thermal stress cycle test having been carried out to both the conventional printed-wing board 1 in which the tin-lead eutectic solder 3 was used and the conventional printed-wiring board 1 in which the lead-free solder was used.
In the thermal stress cycle test, an electronic part was fixed to the conventional printed-wiring board 1 with the tin-lead eutectic solder 3 and lead-free solder (Sn—Ag), respectively, under the same conditions, and thereafter, the thermal stress cycle test in which a cycle of −40 degrees centigrade (30 minutes), 25 degrees centigrade (5 minutes), 125 degrees centigrade (30 minutes) and 25 degrees centigrade (5 minutes) was repeated was carried out to the printed-wiring board 1. The numbers of the cycles having been carried out until the disconnection was caused were compared to each other.
In FIG. 11, “∘” indicates that a resistance was not varied, “Δ” indicates that a resistance raised, and “X” indicates that the disconnection was caused.
The electronic part 4 was mounted on the external surface pattern 7 electrically connecting the external surface lands 7a to each other, and an electrical resistance across the external surface lands 7a was observed. The disconnection was judged to occur when the electrical resistance became infinite.
The number of test samples was eight. For instance, “∘8” indicates that a resistance was not varied in all of the eight test samples, and “X7, ∘1” indicates that the disconnection was found in seven test samples among the eight test samples and a resistance was not varied in the rest of the test samples.
As shown in FIG. 11, in the conventional printed-wiring board 1 to which a part was soldered with lead-free solder, an electrical resistance raised when the cycle number of thermal impact test was 200 (a resistance raised in the one test sample, and a resistance was not varied in the seven test samples), and the disconnection was caused in almost all of the test samples when the cycle number of thermal impact test was 300 (a resistance raised in the seven test samples, and a resistance was not varied in the one test sample). Thus, it was found out that the disconnection was likely to be caused early, if a part was soldered to the printed-wiring board with lead-free solder rather than lead-containing solder.
FIG. 12 is an enlarged cross-sectional view of a corner of the through-hole 2 observed after the thermal stress cycle test was carried out to the conventional printed-wiring board 1 including lead-free solder.
The thermal stress cycle test was carried out 300 cycles to the conventional printed-wiring board 1 including lead-free solder. One cycle is comprised of −40 degrees centigrade (80 minutes), room temperature (5 minutes), 125 degrees centigrade (30 minutes) and room temperature (5 minutes).
As illustrated in FIG. 12, it was found out that there was generated big crack CR throughout the lead-free solder 9 at a corner 2b of the through-hole 2 covered with the lead-free solder 9, and hence, the disconnection was caused in the external surface pattern 7.
In addition, it was found out that there was generated big peeling-off of wall WP between the electrical conductive layer 2a and the pre-pregs 5 with the result that the electrical conductive layer 2a was peeled off the pre-pregs 5, and there was also generated a crack CR starting from the wall peeling-off WP.
Specifically, as a result of the generation of the wall peeling-off WP between the electrically conductive layer 2a and the pre-pregs 5, the crack CR was generated at the corner 2b of the through-hole 2, and resultingly, the disconnection was caused in the external surface pattern 7 The disconnection significantly reduces reliability of an electronic device including the conventional printed-wiring board 1 in which the lead-free solder 9 is used.
FIG. 13 shows a proportion defective of the conventional printed-wiring board 1 including lead-free solder.
FIG. 13(a) is a graph showing a proportion defective of each of parts, and FIG. 13(b) is a table showing a proportion defective of each of parts.
In FIG. 13, there are shown a rate at which peeling-off of wall is generated, measured immediately after three connectors A, B and C were soldered to the conventional printed-wiring board 1 with lead-free solder, and a rate at which crack is generated, measured after the above-mentioned temperature cycle test was carried out 500 times. The rates were measured by observing a cross-section of an area in which the connectors were soldered to the printed-wiring board.
As shown in FIG. 13, a rate at which peeling-off of wall is generated and a rate at which crack is generated are almost 100% with respect to the connector A composed of polyamide. A rate at which peeling-off of wall is generated is almost 72%, and a rate at which crack is generated is almost 78% with respect to the connector B composed of polybutadieneterephthalate. A rate at which peeling-off of wall is generated is almost 5%, and a rate at which crack is generated is almost 0% with respect to the connector C composed of liquid crystal polymer.
It was experimentally found out in view of the results shown in FIG. 13 that a connector having a higher rate at which wall peeling-off WP was generated immediately after the connector was soldered to the printed-wiring board had a higher possibility at which crack CR was generated after the temperature cycle test was carried out 500 cycles, and hence, the crack CR and the wall peeling-off WP in the corner 2b of the through-hole 2 had explicit correlation with each other.
FIG. 14(a) is a cross-sectional view showing a cause by which crack is generated in the conventional printed-wiring board 1 including lead-free solder, and FIG. 14(b) shows coefficients of thermal expansion of a printed-wiring board composed of epoxy, the electronic part 4, and the lead-free solder 9.
As shown in FIG. 14(b), the electronic part 4 mounted on the printed-wiring board 1 is composed of polyamide resin having a much difference in a coefficient of thermal expansion with the printed-wiring board 1, similarly to the connector A (see FIG. 13). The electrode 4a of the electronic part 4 has a square cross-section having sides each of which is 0.5 mm or longer.
In the electronic part 4, the wall peeling-off is generated between the electrically conductive layer 2a and the pre-pregs 5 in areas located close to the external surface layers (see FIG. 12). In addition, it is readily considered that if thermal stress is repeatedly exerted on the electronic part during the temperature cycle test, stress is likely to be concentrated to the corner 2b of the through-hole 2 in comparison with a case where the wall peeling-off WP is not generated, and hence, the crack CR is generated with the result of early disconnection.
Most of the electronic parts 4 having a high rate at which the wall peeling-off WP is generated is a connector to be connected to a power source. It is quite difficult to design a connector to have the electrode 4a having a small diameter in order to ensure a constant current density. In addition, a connector is quite often composed of polyamide, because it is cheap and can be readily processed.
Accordingly if the electronic part 4 is soldered to a printed-wiring board with the lead-free solder 9, it is considered that the crack CR is caused at the corner 2b of the through-hole 2 at a quite high possibility due to the wall peeling-off WP. Needless to say, if the crack CR is caused at the corner 2b of the through-hole 2, reliability of the electronic part 4 would be much reduced.
In the conventional printed-wiring board 1, there are caused not only the wall peeling-off WP, but also peeling-off of a land LP between the external surface lands 7a and the pre-pregs 5.
FIG. 15 is an enlarged cross-sectional view of an area in which peeling-off of land LP is generated in the conventional printed-wiring board 1 including the lead-free solder 9.
As illustrated in FIG. 15, in the conventional printed-wiring board 1 including the lead-free solder 9, the external surface land 7a is peeled off the pre-pregs 5, that is, peeling-off of land LP is generated, because the lead-free solder 9 has a high solidifying point.
If the land peeling-off LP is generated, the external surface pattern 7 mechanically and electrically connected to the external surface land 7a is much twisted, and hence, floated. Under such condition, if the external surface pattern 7 connected to the external surface land 7a is thermally stressed, disconnection would be readily caused in the external surface pattern 7. The land peeling-off LP causes disconnection defectiveness which exerts harmful influence on reliability of the printed-wiring board 1.
Among the wall peeling-off WP, the crack CR and the land peeling-off LP both generated at the corner 2b of the through-hole 2, which are all generated in the conventional printed-wiring board 1 including the lead-free solder 9, if the wall peeling-off WP and the crack CR are generated in particular, it would be quite difficult to identify where they are generated and find out defective printed-wiring boards.
This is because, whereas the land peeling-off LP is generated at surfaces of the first and N-th layers, and hence, can be visually found out, the wall peeling-off WP and the crack CR are generated in the through-hole 2 or at the corner 2b of the through-hole 2 covered with solder fillet, they cannot be visually found out.
FIG. 16 shows simultaneous generation of the wall peeling-off WP and the land peeling-off LP in the conventional printed-wiring board 1 including the lead-free solder 9.
As illustrated in FIG. 16, the electrode 4a of the electronic part 4 is soldered in the through-hole 2 of the printed-wiring board 1 with the lead-free solder 9. In the printed-wiring board 1, there is generated wall peeling-off WP, that is, the electrically conductive layer 2a is peeled off the pre-pregs 5, and there is further generated land peeling-off LP, that is, the external surface land 7a is peeled off the pre-pregs 5.
That is, if the electronic part 4 is composed of polyamide resin quite different from the printed-wiring board 1 with respect to a coefficient of thermal expansion, and the electrode 4a having a square cross-section having sides each having a length of 0.5 mm or greater is soldered in the through-hole with the lead-free solder 9, the wall peeling-off WP and the land peeling-off LP may be simultaneously generated due to the causes, respectively.
The wall peeling-off WP is primarily caused by a difference in a coefficient of thermal expansion or contraction between the printed-wiring board 1 ad the electronic part 4 in directions of X-Y axes, and the land peeling-off LP is primarily caused by a difference in timing between thermal expansion or contraction of the printed-wiring board 1 in a Z-axis direction and solidification of the lead-free solder 9 dependent on a high melting point of the lead-free solder 9. If the wall peeling-off WP and the land peeling-off LP are simultaneously generated, continuous peeling-off would be generated between the external surface land 7a and the electrically conductive layer 2a. 
As explained above, when the electronic part 4 is soldered to the conventional printed-wiring board 1 with the lead-free solder 9, the wall peeling-off WP and the land peeling-off LP may be simultaneously generated, in which case, reliability of the printed-wiring board 1 is reduced. The same as mentioned above is applied to an electronic device including the electronic part 4 soldered to the conventional printed-wiring board 1 with the lead-free solder 9.